Paris here I appear to be coming!
Feb. 10th, 2004 01:04 pm*********************************************************************
* Ecole Normale Supe'rieure *
* *
* Se'minaire *
* SEMANTIQUE ET INTERPRETATION ABSTRAITE *
* P. Cousot *
* *
* Vendredi, 14h00--15h30 *
* Salle U/V, etage -2 *
* DI ENS 45 rue d'Ulm 75005 Paris *
*********************************************************************
*** Vendredi 19 mars 2004 *** 14h00 ********************************
Sarah THOMPSON (Computer Laboratory, University of Cambridge)
Abstract Interpretation of Asynchronous Circuits
Re'sume' : We present an abstract interpretation framework that allows dynamic
properties of asynchronous digital circuits to be statically determined. In
our model, time is linear, dense and continuous, with the structure (but not
the arithmetic) of the real numbers. Within a finite time window, signals can be
represented by their start and end states, along with the count of complete
cycles during the window. Defining the familiar logical operators in terms of
these values results in a 'logic' that, given known inputs, can place bounds
on the number and kind of transitions that may occur at the output of a
combinational circuit. A hierarchy of simplified logics, related by Galois
connections, have been identified that offer varying degrees of accuracy.
Applications include simulation, model checking, synthesis and optimisation.
Reference:
[1] S. Thompson and A. Mycroft, Sliding Window Logic Synthesis, UK
Asynchronous Forum, Cambridge, January 2004, Available from
http://st326.st-edmunds.cam.ac.uk/mypapers/
*********************************************************************
Pour recevoir l'annonce par courrier electronique:
WWW: http://www.di.ens.fr/~cousot/annonceseminaire.shtml
*********************************************************************
* Ecole Normale Supe'rieure *
* *
* Se'minaire *
* SEMANTIQUE ET INTERPRETATION ABSTRAITE *
* P. Cousot *
* *
* Vendredi, 14h00--15h30 *
* Salle U/V, etage -2 *
* DI ENS 45 rue d'Ulm 75005 Paris *
*********************************************************************
*** Vendredi 19 mars 2004 *** 14h00 ********************************
Sarah THOMPSON (Computer Laboratory, University of Cambridge)
Abstract Interpretation of Asynchronous Circuits
Re'sume' : We present an abstract interpretation framework that allows dynamic
properties of asynchronous digital circuits to be statically determined. In
our model, time is linear, dense and continuous, with the structure (but not
the arithmetic) of the real numbers. Within a finite time window, signals can be
represented by their start and end states, along with the count of complete
cycles during the window. Defining the familiar logical operators in terms of
these values results in a 'logic' that, given known inputs, can place bounds
on the number and kind of transitions that may occur at the output of a
combinational circuit. A hierarchy of simplified logics, related by Galois
connections, have been identified that offer varying degrees of accuracy.
Applications include simulation, model checking, synthesis and optimisation.
Reference:
[1] S. Thompson and A. Mycroft, Sliding Window Logic Synthesis, UK
Asynchronous Forum, Cambridge, January 2004, Available from
http://st326.st-edmunds.cam.ac.uk/mypapers/
*********************************************************************
Pour recevoir l'annonce par courrier electronique:
WWW: http://www.di.ens.fr/~cousot/annonceseminaire.shtml
*********************************************************************